ASIC verification is about verifying the design under test.
Hence the experience should not really cover, design, synthesis, STA, DFT, just when it touches verification . You can ask questions related to this but that would be extra experience, a verification engineer verifies. To find out if a verification engineer is junior or senior, you let him or her talk first. Describe the projects you worked on, what did you do, how did that go, … . From the story you hear, it will be clear already what the experience is of the person involved. And by asking side questions while the story is told, you will cover the important requirements.
For verification, methodology is very important. Hence, a few questions that come to mind:
Tell me what is the ratio between time spent in design and time spent for verification?
Is it better to do module sims first and then toplevel or do most of the verification effort on toplevel?
Which one would you recommend and most important, why?
What is your criterium to consider a system or subsystem verified?
Can you measure this?
How do you measure this?
What do you know about code coverage, sv assertions, VIP models, UVM, verification matrix, verification plan.
What is your level of experience with embedded software, firmware?
C/C++, assembler, compilers, ARM or leon or 8051, NIOS, macroblaze, or any embedded processor.
What about an instruction set simulator?
Did you verify communication protocols, if yes, which ones?
Did you verify on pad level or just the digital core?
What can you tell me about regression?
Is it useful?
Downsides?
How long does a toplevel RTL test take?
What is your linux experience? Scripting? Shell scripts? Python? Perl? Tcl? Any other?
What do you know about gatelevel sims? X-poisoning? Timing info? Any special items in the netlist you need to take into consideration?
Out of the top of my head, these would be questions I would ask. And of course, questions that are unrelated to this.
Some examples:
Questions just to see how they handle these questions, how do they deal with this if they don’t know the answer. Do they guess and the guess is ridiculous. Do they just admit they don’t know? Quite interesting observations when asking these unexpected questions.