BERT VERRYCKEN

FREELANCER                     ENGINEER - WRITER - 3D ADDICT

Semiconductor Expert

Started chip design in the nineties


Protocols: USB, ETH, PCIe, ATM, SPI, I2C, I2S, SONET/SDH, I2S, LIN, CAN, eMMC, ...

ASIC and FPGA design

From specification to yield optimization. 20+ years of working with all frontend tools.

3D modeling-printing

I design using Blender and print on Prusa i3 original 3D printers with PLA.

Technical writer

I speak nerd fluently. Quora topwriter 2018. Regular posts on Linkedin.

Home automation

I  ❤️ Raspberry Pi, Arduino and ESP. I automate and measure using the above SBC's.

DESIGN

I DESIGN YOUR ASIC OR FPGA

TRAINING

I TRAIN YOUR VLSI STAFF

WRITE

I WRITE YOUR TECHNICAL CONTENT

ACHIEVEMENTS

MythIC-AI M1 ASIC

Freelance verification (UVM).
August 2020 - current.

Mixed signal AMP (Analog Matrix Processor) for openPose, RESNET-50, Yolo, ...

movidius myriad X VPU ASIC

ASIC front-end design and architecture.

January 2016 - January 2017

Network on Chip design, all memory and memBist generation, functional and post-layout gatelevel simulation, IP upgrades.
Best embedded processor 2018 award.

satellite (DE)modulator FPGA

Freelance FPGA design and board bring-up

2011-2012, 2014

DVB-S2X modulator design and testing over satellite (first world record throughput over satellite > 500Mbps in 2012). Demodulator board bring-up, design and verification.

Intel Movidius Keem Bay ASIC

Freelance design, verification, embedded software.

March 2018 - September 2018

The gen 3 VPU successor to the Movidius Myriad X.
Edge competition for the Nvidia TX2.

movidius myriad II VPU ASIC

Freelance USB silicon validation

April 2015 - December 2015

Eembedded software for myriad2 to enumerate device, max throughput in USB 2.x and USB3.x. Jost bare metal.
Multi-award winning product in 2016. NCS CES award in 2018 .
OTHER projects:
- Bluetooth low energy ASIC (2011).
- 5 automotive mixed-signal ICs first time right (2006-2010).
- Litecoin FPGA core (2013).
- Bitcoin miner ASIC MVP (2021).
- Single-pair ethernet ASIC (ADI, 2019).
- USB IP (2000, 2002).

More Skills


TECHNICAL
  • Architecture
  • Network On Chip
  • IP evaluation
  • Embedded SW (ARM, RISC, DSP)
  • Project management
  • Specification & documentation
  • Silicon test and yield, binning
  • Power islands and control
REMOTE WORK ADVOCATE
  • Separated Office at home
  • Fully equipped mini-lab
  • Focus on efficient tools
  • Productivity
  • Lean Mean Methodology 
  • Teamwork
  • Team building
  • Teach by example

References

b. O.

Analog Devices  |  Supervisor
"We would like to thank Bert's all-round design skills and his flexibility to be available as necessary to accommodate the  project needs to ensure its success."

b. b.

movidius  |  supervisor
"I recommend Bert’s all-round ASIC design skills and his flexibility to be available as necessary to accommodate the project needs to ensure its success"

Contact Me

My goal is to assists businesses with faster, low-risk and lean budget design services, advise or training.


Copyright © 2023 Bert Verrycken