There is no technical reason to be physically present for 100% of the time for FPGA work.
(I am not affiliated with any brand mentioned below)
As a poor lonesome dVLSI engineer, I wanted to control my dev boards from a distance.
Hence, I hooked up a Raspberry Pi and a cheap RF transmitter to be able to send out click on/off commands.
I still use it today, the picture below shows an older Raspberry Pi (RPi) version with a 433MHz RF board connected to the GPIO.
For example, I can power toggle every single 3D printer via a remote controlled power outlet as depicted below (black box).
My office is at home but completely separate from my home. I never mix business with pleasure. So, if I VPN into my office network, I can power cycle a number of my devices.
In case of the Digilent Arty S7 board in the article main picture, a reset is not always enough to fix an issue, so I rely on a power cycle to start fresh. With the RPi it is easy to connect a USB webcam or the affordable Pi cam to see the board via video streaming. So, next up is a place to run the FPGA tools. Next to the board I placed a Windows desktop that has the latest version of the FPGA tools (in this case Vivado). Via a VNC connection I can control the PC from a distance. Depending on the place I do my work, I could also generate a bitfile locally and put it on the Windows machine. And the Windows machine has the Xilinx cable for configuring the FPGA connected to it. This is not different from the "official" Xilinx cable that can be connected via ethernet to a LAN. I didn't buy the LAN cable but used an older desktop with the "normal" cable. Now, for this particular board, the FPGA can be configured via USB, the "programmer" (*) is on the board.
So, I repeat, there is no TECHNICAL reason to not allow engineers to work from home (**). It is typically Dilbert, to get up at 7 am, rush through breakfast, lose an hour or more in a traffic jam, punch the time clock while totally jacked up from traffic stress to start up your office computer. AND THEN OPEN A VNC SESSION TO A SERVER SOMEWHERE IN THE WORLD. While you could just get up at 7am, take your breakfast and start your VNC at 7.30 am at home. I mean, seriously. We design the cutting edge system-on-chips, high-tech, the next generation IC's. But we never consider the many hours we lose everyday and consider that normal? No, we have to reschdule holidays due to project slip. Doh!
(*) Field Programmable Gate Array (FPGA) has the term "programmable" in it. This creates confusion, especially for people with a software background. Computer science students for example. Because a processor has an instruction set (ISA). And software (C/C++) is compiled with a target ISA into a hex file that is put inside program memory. Now, an FPGA is not a processor and has no ISA. There can be a processor (one or more) embedded in the FPGA but the code we write for an FPGA is called HDL, Hardware Description Language. It has a software syntax. But it isn't software at all. It describes hardware. Hence, I try to carefully use the term "programming" for software compilation using an ISA and the configuration of an FPGA with a digital design described in HDL. Furthermore, I am aware of the fact that HSL, high-level synthesis exists. It was a hype around the year 2000 too. Still, the only way that C/C++ can be used to write hardware is to put extra steps in place to get to a HDL description. One thing that is often difficult to grasp is that hardware has virtually no constraints concerning parallel processing when designing it (Nvidia parallel CUDA cores). But software runs sequentially. It has threads that allow some limited parallelization but it is one of the major issues in software to make use of all threads on all cores of a 64-core threadripper for example.
(**) It requires discipline and a separation of the living area of the house for employees. For managers it needs a different management style and a different organization of the project (there are tools for that).